How to catch more “disappearing” latent defects before they turn into reliability time bombs
Macro defects missed by sampling can become invisible to later screening techniques (electrical test and/or final inspection) and these latent defects can turn into reliability issues.
Automotive is demanding more emphasis on chip reliability
By 2020, electronic devices will account for over 35% of the manufacturing cost of an automobile, and by 2030, that number is expected to rise to 50%. Tens of thousands of cars are manufactured each day, with each car using thousands of chips — and if even one of those chips fails in the field it may have disastrous consequences: loss of life, vehicle recalls, major litigation, loss of company reputation and market share and more — potentially totaling billions of dollars.
As a result, carmakers are demanding greater assurances of chip reliability from their suppliers. Now, instead of parts-per-million failure rates they are demanding parts-per-billion levels. And they are insisting that Zero Defect strategies be implemented. So, how do you accomplish that?
Semiconductor macro defects missed by sampling can become invisible to later screening
Fabs have long understood the correlation between Semiconductor wafer yields and chip reliability, so they have used baseline yield improvement as the primary means and metric for increasing chip reliability. But that has not been enough. Certain semiconductor wafer defects need to be detected earlier in line because some of them are evading end-of-line inspection — and becoming reliability “time bombs” that may go off later in the field!
Part of the challenge has been limited semiconductor wafer sampling. Because of time and cost constraints, micro defect inspection is usually only used to sample one or two wafers per lot, and only after certain steps. This sampling aims to monitor baseline defectivity, and it assumes that all other significant semiconductor defects will be caught at end-of-line defect inspection and electrical testing.
However, many types of semiconductor defects, including many macro defects, only occur intermittently. These are frequently missed by sampling. And when they are not flagged in time they can be covered over by subsequent process steps, often becoming invisible to later inspection. See the “disappearing” semiconductor macro defect in the photo sequence above.
100% macro defect inspection: how to catch more time-bomb problems earlier
Because EagleView is an exceptionally fast semiconductor macro defect inspection system, it enables fabs to macro-inspect all of the wafers in a lot, without recipes, in just a few minutes. So there is no need for sampling. Consequently, EagleView can be used after many more process steps, to catch more problems much earlier in line. So fabs can take more effective corrective actions much sooner… To rework wafers rather than scrapping them later. Or to take problem tools off-line for repair before they cause further damage.
Net result: 100% semiconductor macro defect inspection can increase yields while also reducing costs. And, very importantly, it can catch many more time-bomb reliability defects and keep them from becoming disasters later on in the field.
Specializing in semiconductor macro defect inspection
For more than three decades Microtronic has been working to optimize semiconductor wafer macro defect inspection to enhance yields and reliability. If you have questions about Disappearing Latent Macro Defects or related areas, reach out to us at [email protected].
How to catch more “disappearing” latent defects before they turn into reliability time bombs
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How to catch more “disappearing” latent defects before they turn into reliability time bombs
Macro defects missed by sampling can become invisible to later screening techniques (electrical test and/or final inspection) and these latent defects can turn into reliability issues.
Automotive is demanding more emphasis on chip reliability
By 2020, electronic devices will account for over 35% of the manufacturing cost of an automobile, and by 2030, that number is expected to rise to 50%. Tens of thousands of cars are manufactured each day, with each car using thousands of chips — and if even one of those chips fails in the field it may have disastrous consequences: loss of life, vehicle recalls, major litigation, loss of company reputation and market share and more — potentially totaling billions of dollars.
As a result, carmakers are demanding greater assurances of chip reliability from their suppliers. Now, instead of parts-per-million failure rates they are demanding parts-per-billion levels. And they are insisting that Zero Defect strategies be implemented. So, how do you accomplish that?
Semiconductor macro defects missed by sampling can become invisible to later screening
Fabs have long understood the correlation between Semiconductor wafer yields and chip reliability, so they have used baseline yield improvement as the primary means and metric for increasing chip reliability. But that has not been enough. Certain semiconductor wafer defects need to be detected earlier in line because some of them are evading end-of-line inspection — and becoming reliability “time bombs” that may go off later in the field!
Part of the challenge has been limited semiconductor wafer sampling. Because of time and cost constraints, micro defect inspection is usually only used to sample one or two wafers per lot, and only after certain steps. This sampling aims to monitor baseline defectivity, and it assumes that all other significant semiconductor defects will be caught at end-of-line defect inspection and electrical testing.
However, many types of semiconductor defects, including many macro defects, only occur intermittently. These are frequently missed by sampling. And when they are not flagged in time they can be covered over by subsequent process steps, often becoming invisible to later inspection. See the “disappearing” semiconductor macro defect in the photo sequence above.
100% macro defect inspection: how to catch more time-bomb problems earlier
Because EagleView is an exceptionally fast semiconductor macro defect inspection system, it enables fabs to macro-inspect all of the wafers in a lot, without recipes, in just a few minutes. So there is no need for sampling. Consequently, EagleView can be used after many more process steps, to catch more problems much earlier in line. So fabs can take more effective corrective actions much sooner… To rework wafers rather than scrapping them later. Or to take problem tools off-line for repair before they cause further damage.
Net result: 100% semiconductor macro defect inspection can increase yields while also reducing costs. And, very importantly, it can catch many more time-bomb reliability defects and keep them from becoming disasters later on in the field.
Specializing in semiconductor macro defect inspection
For more than three decades Microtronic has been working to optimize semiconductor wafer macro defect inspection to enhance yields and reliability. If you have questions about Disappearing Latent Macro Defects or related areas, reach out to us at [email protected].
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