Increasing Semiconductor Device Reliability Requires Adding More Wafer Inspection – Here’s A Way

An increasing need

Some industry sectors such as automotive and medical continue to push for higher and higher reliability levels.  However, many fabs are having difficulties achieving them. Current inspection regimes still allow too many semiconductor defects to pass through and escape to the field. This is primarily because of time and expense issues.

Too much wafer is still left uninspected

One fundamental problem is the amount of semiconductor wafer real estate that is currently going uninspected. Even though much inspection is being done, still, the total inspected area remains small compared to the cumulative semiconductor wafer surface passing through production (see comparison chart below).

Today, fabs employ several different types of semiconductor inspections, each playing a special role in the overall defect management program. But now, if additional semiconductor wafer inspection is needed, what specific types of inspection should be increased, and where? And can this be accomplished without dramatically impacting budgets and production schedules?

Automated Micro Inspection

These are the “big guns” in many fabs’ defect inspection arsenal today. The automated, highly advanced micro inspection tools are able to detect extremely small defects, below 1µm. These micro inspection tools are essential for catching today’s ever-shrinking killer defects. However, these tools are costly, require device-dependent recipes and are comparatively slow, with throughputs of ~175 wafers per day.

Automated micro inspection tools are used in line, but only to a limited degree – at a handful of key production steps, typically sampling two semiconductor wafers from the lot. Though it might be desirable to add more automated micro inspections at many more steps, that is generally not feasible either from a cost or production time standpoint.

Automated Mid-Micro Inspection

These tools are similar to the micro inspection tools, except with lower magnification. The mid-micro tools also require device-dependent recipes to perform die-to-die inspection, and they will detect defects down to ~10µm. They provide higher throughput (~600 wafers per day) and are lower in price, but they are still expensive enough for fabs to limit their use to the end of line. These tools are frequently used for outgoing inspection of bond pads, probe marks, etc.

Manual Microscope Inspection

Optical microscopes are used for post photo or post CMP inspection. A typical fab might employ microscopes to sample five wafers from a lot and looking at five sites on each of the five wafers.

Optical microscopes are used for many types of semiconductor defects very effectively and provide much useful information. These instruments can be applied to study features and semiconductor defects smaller than 1µm. However, the quality of this inspection can vary substantially with the experience and alertness of human operators. Also, these inherently subjective inspections do not generate standardized or comprehensive reporting that can be used fab-wide. And fundamentally, microscope inspection remains a sampling method, not well-suited to covering the substantial amount of additional wafer surface we need to inspect.

Naked-Eye and Bright-Light Inspection

It should be noted that some fabs still use some form of human-eye inspection, using it to look at every wafer in every lot. This method serves a useful purpose in spotting gross or obvious problems on wafer surfaces. Like microscope inspection, however, it is inherently subjective, and its value can vary greatly with the knowledge and experience of the viewer. It, too, does not generate any standardized reporting or record-keeping for the fab.

So, what additional wafer inspection can be added?

Automated Semiconductor Wafer Macro Defect Inspection – opening new possibilities

This is a newer generation of automated semiconductor wafer inspection tools that fits between the automated micro and mid-micro tools and the non-automated human inspection methods. These automated macro defect inspection tools, such as the EagleView from Microtronic, do not require recipes, and they are extremely fast and capable of throughputs of over 3000 wafers per day. Plus, they create a unique, high-resolution color image of the entire surface of every wafer in the lot.

This accomplishes three things: First, it substantially increases the total semiconductor wafer surface area inspected during production. Second, it allows fabs to precisely identify types and locations of a wide range of macro surface defects. Third, it provides a consistent, detailed and permanent record of every wafer in the lot at many important steps in processing. Additionally, the macro defect information from these automated tools can be combined with micro defect data to create a powerful, comprehensive defectivity database. This database can be used by the entire fab at any time, both now and in the future.

Covering much more wafer surface at many more steps

Engineered to cover extensive semiconductor wafer surface areas with speed and cost-efficiency, these innovative tools enable comprehensive inspection across a significantly greater number of in-line production steps. A single automated semiconductor wafer macro defect inspection tool, for example, could be used for 100%inspection at many photo and/or CMP levels.

Adding automated semiconductor wafer macro defect inspection can significantly increase wafer surface coverage compared to previous tools. This boost in coverage enhances overall defect detection levels and reliability.

The chart below compares typical amounts of semiconductor wafer surface seen by different defect inspection tools. These figures are based on a fab running 200mm wafers, 500 wafer starts per day, 300 process steps, and 30 mask levels.

Improving inline performance, as well

Adding 100% semiconductor wafer macro defect inspection in-line can alert fabs to process excursions and intermittent problems (onesies-twosies) immediately. Thus allowing faster, more accurate, and much more cost-effective corrective actions to be taken – without waiting for backend inspection or electrical probe results, which can be much more costly and ineffective for correcting in-line problems.

Bottom line, for many fabs automated semiconductor wafer macro defect inspection tools can be useful. They can also be comparatively easy to implement, and a cost-efficient way to look at much more wafer surface that has been going uninspected.

Specializing in semiconductor macro defect inspection

For more than three decades, Microtronic has worked to optimize semiconductor wafer macro defect inspection to enhance yields and reliability. If you have questions in any of these areas, please email us at [email protected]. If you’d like to suggest a topic for a future bulletin, let us know.